Active Networks: IFIP-TC6 5th InternationalWorking by Hiroshi Yasuda (auth.), Naoki Wakamiya, Marcin Solarski,

By Hiroshi Yasuda (auth.), Naoki Wakamiya, Marcin Solarski, James Sterbenz (eds.)

This quantity of the LNCS sequence comprises the complaints of the fifth Internat- nal operating convention on energetic Networks (IWAN 2003) held within the historic cultural urban of Kyoto, Japan. This yr we obtained seventy three submissions. The expanding quantity exhibits that energetic Networks is still an enticing ?eld of study. via - reful reviewing and dialogue, our software committee determined to completely settle for 21 papers. 3 papers have been conditionally authorised, and have been integrated after shepherding via contributors of the technical software committee. This quantity hence contains those 24 papers that have been awarded at IWAN 2003. extra papers have been offered in a poster consultation on the convention. the simplest paper award went to Kenneth L. Calvert, James N. Gri?oen, - jati Imam, and Jiangbo Li (University of Kentucky) for “Challenges in Imp- menting an ESP Service,” which starts those court cases and which all started the papers within the excessive functionality & community Processors consultation. Papers in those court cases are geared up into seven classes: High-Level energetic community - plications, Low-Level lively community functions, Self-Organization of energetic providers, administration in lively Networks, stories with carrier Engin- ring for lively Networks, and chosen issues in lively Networks, starting from threat administration to context-aware handover and peer-to-peer communications.

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W. Lockwood, N. Naufel, J. S. Turner, and D. E. Taylor. Reprogrammable network packet processing on the field programmable port extender (FPX). In ACM International Symposium on Field Programmable Gate Arrays (FPGA ’01), pages 87–93, Feb. 2001. 19. J. T. Moore, M. Hicks, and S. Nettles. Practical programmable packets. In Proceedings of INFOCOM ’01, Apr. 2001. 20. S. Murphy, E. Lewis, R. Puga, R. Watson, and R. Yee. Strong security for active networks. Proceedings of IEEE OPENARCH ’01, pages 63–70, Apr.

Network processor programmability. 1 Programmability The NP hardware is typically combined with a horizontally layered software architecture (see Figure 1). On the lowest layer, the NP instruction set provides means for direct packet handling. Many NPs allow access to the instruction memory from a separate control processor, enabling extension or update of the router functionality at runtime. On the control processor, application programming interfaces (APIs) provide an abstract view of the resources of the network node [1].

1 Introduction The ongoing convergence of voice, broadcast, and data networks leads to a demand for a novel flexible and high-performance packet-forwarding technology. Flexibility is needed for short development cycles and for the support of evolving protocols and standards, combined with the shift towards high-performance packet handling [25] due to the increasing bandwidth demands. Today, packet handling is performed by application-specific integrated circuits (ASICs), fieldprogrammable gate arrays (FPGAs), or general-purpose processors (GPPs).

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